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3D Network-on-Chips Modeling and Optimization
NoC design, synthesis, and implementation
The research group aims at optimizing the design of on-chip interconnects for complex SoC systems. Using bio-inspired optimization algorithms, we study the impact of changing various design parameters on the system performance to find the optimum architecture of the on-chip network. The objectives are to maximize processor speed & system reliability and minimize energy consumption & implementation area.
Group Coordinator: Dr. Haytham El Miligi
Email: helmiligi@tru.ca
Phone: 250-828-5230
Join us to explore research ideas and opportunities and to support our student researchers as they share the results of their research. Science students from all areas of Science will be presenting posters from projects completed through Honours, Directed Studies, Undergraduate Research Experience Award Program (UREAP), and other research programs.
When and Where
Date: Tuesday, April 14
Time: 12:30–2:30 p.m.
Location: Second floor, Science Building
SUPER is designed to inspire early-year science students by highlighting what senior students have achieved. First, second, and third-year Science students are encouraged to come discover the many research opportunities available to them throughout their degree.
Information for Presenters
